patch-2.3.41 linux/arch/m68k/kernel/bios32.c

• Lines: 717
• Date: Wed Jan 26 12:44:20 2000
• Orig file: v2.3.40/linux/arch/m68k/kernel/bios32.c
• Orig date: Thu Jan 6 12:57:47 2000

diff -u --recursive --new-file v2.3.40/linux/arch/m68k/kernel/bios32.c linux/arch/m68k/kernel/bios32.c
@@ -1,6 +1,5 @@
 /*
- * bios32.c - PCI BIOS functions for Alpha systems not using BIOS
- *	      emulation code.
+ * bios32.c - PCI BIOS functions for m68k systems.
  *
  * Written by Wout Klaren.
  *
@@ -22,25 +21,16 @@
 /*
  * PCI support for Linux/m68k. Currently only the Hades is supported.
  *
- * Notes:
- *
- * 1. The PCI memory area starts at address 0x80000000 and the
- *    I/O area starts at 0xB0000000. Therefore these offsets
- *    are added to the base addresses when they are read and
- *    substracted when they are written.
- *
- * 2. The support for PCI bridges in the DEC Alpha version has
- *    been removed in this version.
+ * The support for PCI bridges in the DEC Alpha version has
+ * been removed in this version.
  */
 
 #include <linux/pci.h>
 #include <linux/malloc.h>
 #include <linux/mm.h>
 
-#include <asm/atarihw.h>
-#include <asm/atariints.h>
-#include <asm/byteorder.h>
 #include <asm/io.h>
+#include <asm/pci.h>
 #include <asm/uaccess.h>
 
 #define KB		1024
@@ -48,14 +38,7 @@
 #define GB		(1024*MB)
 
 #define MAJOR_REV	0
-#define MINOR_REV	1
-
-/*
- * Base addresses of the PCI memory and I/O areas on the Hades.
- */
-
-static unsigned long pci_mem_base = 0;
-static unsigned long pci_io_base = 0;
+#define MINOR_REV	5
 
 /*
  * Align VAL to ALIGN, which must be a power of two.
@@ -63,181 +46,51 @@
 
 #define ALIGN(val,align)	(((val) + ((align) - 1)) & ~((align) - 1))
 
+#define MAX(val1, val2) 	(((val1) > (val2)) ? val1 : val2)
+
 /*
- * Calculate the address of the PCI configuration area of the given
- * device.
- *
- * BUG: boards with multiple functions are probably not correctly
- * supported.
+ * Offsets relative to the I/O and memory base addresses from where resources
+ * are allocated.
  */
 
-static int mk_conf_addr(unsigned char bus, unsigned char device_fn,
-			unsigned char where, unsigned long *pci_addr)
-{
-	static const unsigned long pci_conf_base[] = { 0xA0080000, 0xA0040000,
-						       0xA0020000, 0xA0010000 };
-	int device = device_fn >> 3;
-
-	DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n",
-		  bus, device_fn, where, pci_addr));
-
-	if (device > 3) {
-		DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning -1\n", device));
-		return -1;
-	}
-
-	*pci_addr = pci_conf_base[device] | (where);
-	DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", *pci_addr));
-	return 0;
-}
-
-int pcibios_read_config_byte(unsigned char bus, unsigned char device_fn,
-			     unsigned char where, unsigned char *value)
-{
-	unsigned long pci_addr;
-
-	*value = 0xff;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	*value = *((unsigned char *)pci_addr);
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-int pcibios_read_config_word(unsigned char bus, unsigned char device_fn,
-			     unsigned char where, unsigned short *value)
-{
-	unsigned long pci_addr;
-
-	*value = 0xffff;
-
-	if (where & 0x1)
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr))
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	*value = le16_to_cpu(*((unsigned short *)pci_addr));
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-int pcibios_read_config_dword(unsigned char bus, unsigned char device_fn,
-			      unsigned char where, unsigned int *value)
-{
-	unsigned long pci_addr;
-
-	*value = 0xffffffff;
-
-	if (where & 0x3)
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr))
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	*value = le32_to_cpu(*((unsigned int *)pci_addr));
-
-	if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5))
-	{
-		if ((*value & PCI_BASE_ADDRESS_SPACE) ==
-		    PCI_BASE_ADDRESS_SPACE_IO)
-			*value += pci_io_base;
-		else
-		{
-			if (*value == 0)
-			{
-				/*
-				 * Base address is 0. Test if this base
-				 * address register is used.
-				 */
-
-				*((unsigned long *)pci_addr) = 0xffffffff;
-				if (*((unsigned long *)pci_addr) != 0)
-					*value += pci_mem_base;
-			}
-			else
-				*value += pci_mem_base;
-		}
-	}
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-int pcibios_write_config_byte(unsigned char bus, unsigned char device_fn,
-			      unsigned char where, unsigned char value)
-{
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	*((unsigned char *)pci_addr) = value;
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-int pcibios_write_config_word(unsigned char bus, unsigned char device_fn,
-			      unsigned char where, unsigned short value)
-{
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	*((unsigned short *)pci_addr) = cpu_to_le16(value);
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-int pcibios_write_config_dword(unsigned char bus, unsigned char device_fn,
-			       unsigned char where, unsigned int value)
-{
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5))
-	{
-		if ((value & PCI_BASE_ADDRESS_SPACE) ==
-		    PCI_BASE_ADDRESS_SPACE_IO)
-			value -= pci_io_base;
-		else
-			value -= pci_mem_base;
-	}
-
-	*((unsigned int *)pci_addr) = cpu_to_le32(value);
-
-	return PCIBIOS_SUCCESSFUL;
-}
+#define IO_ALLOC_OFFSET		0x00004000
+#define MEM_ALLOC_OFFSET	0x04000000
 
 /*
- * Macro to enable programming of the PCI devices. On the Hades this
- * define should be true, because the Hades has no PCI BIOS.
+ * Declarations of hardware specific initialisation functions.
  */
 
-#define PCI_MODIFY		1
-
-#if PCI_MODIFY
+extern struct pci_bus_info *init_hades_pci(void);
 
 /*
- * Leave some room for a VGA card. We assume that the VGA card is
- * always in the first 32M of PCI memory. For the time being we do
- * not program the VGA card, because to make this work we also
- * need to change the frame buffer device.
+ * Bus info structure of the PCI bus. A pointer to this structure is
+ * put in the sysdata member of the pci_bus structure.
  */
 
-#define FIRST_IO_ADDR	0x10000
-#define FIRST_MEM_ADDR	0x02000000
+static struct pci_bus_info *bus_info;
 
-static unsigned int io_base = FIRST_IO_ADDR;	/* Skip first 64K. */
-static unsigned int mem_base = FIRST_MEM_ADDR;	/* Skip first 32M. */
+static int pci_modify = 1;		/* If set, layout the PCI bus ourself. */
+static int skip_vga = 0;		/* If set do not modify base addresses
+					   of vga cards.*/
+static int disable_pci_burst = 0;	/* If set do not allow PCI bursts. */
+
+static unsigned int io_base;
+static unsigned int mem_base;
+
+struct pci_fixup pcibios_fixups[] =
+{
+	{ 0 }
+};
 
 /*
+ * static void disable_dev(struct pci_dev *dev)
+ *
  * Disable PCI device DEV so that it does not respond to I/O or memory
  * accesses.
+ *
+ * Parameters:
+ *
+ * dev	- device to disable.
  */
 
 static void __init disable_dev(struct pci_dev *dev)
@@ -245,9 +98,9 @@
 	struct pci_bus *bus;
 	unsigned short cmd;
 
-	if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
-	    dev->class >> 8 == PCI_CLASS_DISPLAY_VGA ||
-	    dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)
+	if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
+	     (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
+	     (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
 		return;
 
 	bus = dev->bus;
@@ -258,13 +111,16 @@
 }
 
 /*
- * Layout memory and I/O for a device:
+ * static void layout_dev(struct pci_dev *dev)
+ *
+ * Layout memory and I/O for a device.
+ *
+ * Parameters:
+ *
+ * device	- device to layout memory and I/O for.
  */
 
-#define MAX(val1, val2) ( ((val1) > (val2)) ? val1 : val2)
-
-static void __init layout_dev(struct pci_dev *dev, unsigned long pci_mem_base,
-								  unsigned long pci_io_base)
+static void __init layout_dev(struct pci_dev *dev)
 {
 	struct pci_bus *bus;
 	unsigned short cmd;
@@ -273,12 +129,12 @@
 	int i;
 
 	/*
-	 * Skip video cards for the time being.
+	 * Skip video cards if requested.
 	 */
 
-	if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
-	    dev->class >> 8 == PCI_CLASS_DISPLAY_VGA ||
-	    dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)
+	if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
+	     (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
+	     (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
 		return;
 
 	bus = dev->bus;
@@ -298,7 +154,9 @@
 		if (!base)
 		{
 			/* this base-address register is unused */
-			dev->base_address[i] = 0;
+			dev->resource[i].start = 0;
+			dev->resource[i].end = 0;
+			dev->resource[i].flags = 0;
 			continue;
 		}
 
@@ -318,13 +176,21 @@
 			base &= PCI_BASE_ADDRESS_IO_MASK;
 			mask = (~base << 1) | 0x1;
 			size = (mask & base) & 0xffffffff;
-			/* align to multiple of size of minimum base */
-			alignto = MAX(0x400, size) ;
+
+			/*
+			 * Align to multiple of size of minimum base.
+			 */
+
+			alignto = MAX(0x040, size) ;
 			base = ALIGN(io_base, alignto);
 			io_base = base + size;
 			pcibios_write_config_dword(bus->number, dev->devfn,
-						   reg, base | 0x1);
-			dev->base_address[i] = (pci_io_base + base) | 1;
+						   reg, base | PCI_BASE_ADDRESS_SPACE_IO);
+
+			dev->resource[i].start = base;
+			dev->resource[i].end = dev->resource[i].start + size - 1;
+			dev->resource[i].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
+
 			DBG_DEVS(("layout_dev: IO address: %lX\n", base));
 		}
 		else
@@ -343,16 +209,8 @@
 			switch (type)
 			{
 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
-				break;
-
 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
-				printk("bios32 WARNING: "
-				       "ignoring 64-bit device in "
-				       "slot %d, function %d: \n",
-				       PCI_SLOT(dev->devfn),
-				       PCI_FUNC(dev->devfn));
-				reg += 4;	/* skip extra 4 bytes */
-				continue;
+				break;
 
 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
 				printk("bios32 WARNING: slot %d, function %d "
@@ -364,7 +222,7 @@
 			}
 
 			/*
-			 * Align to multiple of size of minimum base
+			 * Align to multiple of size of minimum base.
 			 */
 
 			alignto = MAX(0x1000, size) ;
@@ -372,7 +230,27 @@
 			mem_base = base + size;
 			pcibios_write_config_dword(bus->number, dev->devfn,
 						   reg, base);
-			dev->base_address[i] = pci_mem_base + base;
+
+			dev->resource[i].start = base;
+			dev->resource[i].end = dev->resource[i].start + size - 1;
+			dev->resource[i].flags = IORESOURCE_MEM;
+
+			if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
+			{
+				/*
+				 * 64-bit address, set the highest 32 bits
+				 * to zero.
+				 */
+
+				reg += 4;
+				pcibios_write_config_dword(bus->number, dev->devfn,
+							   reg, 0);
+
+				i++;
+				dev->resource[i].start = 0;
+				dev->resource[i].end = 0;
+				dev->resource[i].flags = 0;
+			}
 		}
 	}
 
@@ -396,13 +274,30 @@
 
 	pcibios_write_config_word(bus->number, dev->devfn, PCI_COMMAND,
 				  cmd | PCI_COMMAND_MASTER);
+
+	pcibios_write_config_byte(bus->number, dev->devfn, PCI_LATENCY_TIMER,
+				  (disable_pci_burst) ? 0 : 32);
+
+	if (bus_info != NULL)
+		bus_info->conf_device(bus->number, dev->devfn);	/* Machine dependent configuration. */
+
 	DBG_DEVS(("layout_dev: bus %d  slot 0x%x  VID 0x%x  DID 0x%x  class 0x%x\n",
 		  bus->number, PCI_SLOT(dev->devfn), dev->vendor, dev->device, dev->class));
 }
 
-static void __init layout_bus(struct pci_bus *bus, unsigned long pci_mem_base,
-								  unsigned long pci_io_base)
+/*
+ * static void layout_bus(struct pci_bus *bus)
+ *
+ * Layout memory and I/O for all devices on the given bus.
+ *
+ * Parameters:
+ *
+ * bus	- bus.
+ */
+
+static void __init layout_bus(struct pci_bus *bus)
 {
+	unsigned int bio, bmem;
 	struct pci_dev *dev;
 
 	DBG_DEVS(("layout_bus: starting bus %d\n", bus->number));
@@ -415,22 +310,25 @@
 	 * IO and 1MB for memory).
 	 */
 
-	io_base = ALIGN(io_base, 4*KB);
-	mem_base = ALIGN(mem_base, 1*MB);
+	bio = io_base = ALIGN(io_base, 4*KB);
+	bmem = mem_base = ALIGN(mem_base, 1*MB);
 
 	/*
 	 * PCI devices might have been setup by a PCI BIOS emulation
 	 * running under TOS. In these cases there is a
 	 * window during which two devices may have an overlapping
-	 * address range.  To avoid this causing trouble, we first
+	 * address range. To avoid this causing trouble, we first
 	 * turn off the I/O and memory address decoders for all PCI
 	 * devices.  They'll be re-enabled only once all address
 	 * decoders are programmed consistently.
 	 */
 
+	DBG_DEVS(("layout_bus: disable_dev for bus %d\n", bus->number));
+
 	for (dev = bus->devices; dev; dev = dev->sibling)
 	{
-		if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
+		if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
+		    (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
 			disable_dev(dev);
 	}
 
@@ -442,94 +340,193 @@
 
 	for (dev = bus->devices; dev; dev = dev->sibling)
 	{
-		if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
-			layout_dev(dev, pci_mem_base, pci_io_base);
+		if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
+		    (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
+			layout_dev(dev);
 	}
+
+	DBG_DEVS(("layout_bus: bus %d finished\n", bus->number));
 }
 
-#endif /* !PCI_MODIFY */
+/*
+ * static void pcibios_fixup(void)
+ *
+ * Layout memory and I/O of all devices on the PCI bus if 'pci_modify' is
+ * true. This might be necessary because not every m68k machine with a PCI
+ * bus has a PCI BIOS. This function should be called right after
+ * pci_scan_bus() in pcibios_init().
+ */
 
-void __init pcibios_init(void)
+static void __init pcibios_fixup(void)
 {
-	printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV);
+	if (pci_modify)
+	{
+		/*
+		 * Set base addresses for allocation of I/O and memory space.
+		 */
 
-#if !PCI_MODIFY
-	printk("...NOT modifying existing PCI configuration\n");
-#endif
+		io_base = bus_info->io_space.start + IO_ALLOC_OFFSET;
+		mem_base = bus_info->mem_space.start + MEM_ALLOC_OFFSET;
 
-	pci_mem_base = 0x80000000;
-	pci_io_base = 0xB0000000;
+		/*
+		 * Scan the tree, allocating PCI memory and I/O space.
+		 */
+
+		layout_bus(pci_bus_b(pci_root.next));
+	}
+
+	/*
+	 * Fix interrupt assignments, etc.
+	 */
+
+	bus_info->fixup(pci_modify);
 }
 
 /*
- * static inline void hades_fixup(void)
+ * static void pcibios_claim_resources(struct pci_bus *bus)
+ *
+ * Claim all resources that are assigned to devices on the given bus.
  *
- * Assign IRQ numbers as used by Linux to the interrupt pins
- * of the PCI cards.
+ * Parameters:
+ *
+ * bus	- bus.
  */
 
-static inline void __init hades_fixup(void)
+static void __init pcibios_claim_resources(struct pci_bus *bus)
 {
-	char irq_tab[4] = {
-			    IRQ_TT_MFP_IO0,	/* Slot 0. */
-			    IRQ_TT_MFP_IO1,	/* Slot 1. */
-			    IRQ_TT_MFP_SCC,	/* Slot 2. */
-			    IRQ_TT_MFP_SCSIDMA	/* Slot 3. */
-			  };
 	struct pci_dev *dev;
-	unsigned char slot;
-
-	/*
-	 * Go through all devices, fixing up irqs as we see fit:
-	 */
+	int i;
 
-	for (dev = pci_devices; dev; dev = dev->next)
+	while (bus)
 	{
-		if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
+		for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
 		{
-			slot = PCI_SLOT(dev->devfn);	/* Determine slot number. */
-			dev->irq = irq_tab[slot];
-#if PCI_MODIFY
-			pcibios_write_config_byte(dev->bus->number, dev->devfn,
-						  PCI_INTERRUPT_LINE, dev->irq);
+			for (i = 0; i < PCI_NUM_RESOURCES; i++)
+			{
+				struct resource *r = &dev->resource[i];
+				struct resource *pr;
+				struct pci_bus_info *bus_info = (struct pci_bus_info *) dev->sysdata;
+
+				if ((r->start == 0) || (r->parent != NULL))
+					continue;
+#if 1
+				if (r->flags & IORESOURCE_IO)
+					pr = &bus_info->io_space;
+				else
+					pr = &bus_info->mem_space;
+#else
+				if (r->flags & IORESOURCE_IO)
+					pr = &ioport_resource;
+				else
+					pr = &iomem_resource;
 #endif
+				if (request_resource(pr, r) < 0)
+				{
+					printk(KERN_ERR "PCI: Address space collision on region %d of device %s\n", i, dev->name);
+				}
+			}
 		}
+
+		if (bus->children)
+			pcibios_claim_resources(bus->children);
+
+		bus = bus->next;
 	}
 }
 
-void __init pcibios_fixup(void)
+/*
+ * int pcibios_assign_resource(struct pci_dev *dev, int i)
+ *
+ * Assign a new address to a PCI resource.
+ *
+ * Parameters:
+ *
+ * dev	- device.
+ * i	- resource.
+ *
+ * Result: 0 if successfull.
+ */
+
+int __init pcibios_assign_resource(struct pci_dev *dev, int i)
 {
-#if PCI_MODIFY
-	unsigned long orig_mem_base, orig_io_base;
+	struct resource *r = &dev->resource[i];
+	struct resource *pr = pci_find_parent_resource(dev, r);
+	unsigned long size = r->end + 1;
 
-	orig_mem_base = pci_mem_base;
-	orig_io_base = pci_io_base;
-	pci_mem_base = 0;
-	pci_io_base = 0;
+	if (!pr)
+		return -EINVAL;
 
-	/*
-	 * Scan the tree, allocating PCI memory and I/O space.
-	 */
+	if (r->flags & IORESOURCE_IO)
+	{
+		if (size > 0x100)
+			return -EFBIG;
 
-	layout_bus(pci_bus_b(pci_root.next), orig_mem_base, orig_io_base);
+		if (allocate_resource(pr, r, size, bus_info->io_space.start +
+				      IO_ALLOC_OFFSET,  bus_info->io_space.end, 1024))
+			return -EBUSY;
+	}
+	else
+	{
+		if (allocate_resource(pr, r, size, bus_info->mem_space.start +
+				      MEM_ALLOC_OFFSET, bus_info->mem_space.end, size))
+			return -EBUSY;
+	}
 
-	pci_mem_base = orig_mem_base;
-	pci_io_base = orig_io_base;
-#endif
+	if (i < 6)
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, r->start);
 
-	/*
-	 * Now is the time to do all those dirty little deeds...
-	 */
-
-	hades_fixup();
+	return 0;
 }
 
 void __init pcibios_fixup_bus(struct pci_bus *bus)
 {
+	struct pci_dev *dev;
+	void *sysdata;
+
+	sysdata = (bus->parent) ? bus->parent->sysdata : bus->sysdata;
+
+	for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
+		dev->sysdata = sysdata;
+}
+
+void __init pcibios_init(void)
+{
+	printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV);
+
+	bus_info = NULL;
+#ifdef CONFIG_HADES
+	if (MACH_IS_HADES)
+		bus_info = init_hades_pci();
+#endif
+	if (bus_info != NULL)
+	{
+		printk("PCI: Probing PCI hardware\n");
+		pci_scan_bus(0, bus_info->m68k_pci_ops, bus_info);
+		pcibios_fixup();
+		pcibios_claim_resources(pci_root);
+	}
+	else
+		printk("PCI: No PCI bus detected\n");
 }
 
 char * __init pcibios_setup(char *str)
 {
+	if (!strcmp(str, "nomodify"))
+	{
+		pci_modify = 0;
+		return NULL;
+	}
+	else if (!strcmp(str, "skipvga"))
+	{
+		skip_vga = 1;
+		return NULL;
+	}
+	else if (!strcmp(str, "noburst"))
+	{
+		disable_pci_burst = 1;
+		return NULL;
+	}
+
 	return str;
 }
 #endif /* CONFIG_PCI */