patch-2.2.4 linux/arch/i386/kernel/setup.c

• Lines: 161
• Date: Mon Mar 22 11:18:17 1999
• Orig file: v2.2.3/linux/arch/i386/kernel/setup.c
• Orig date: Tue Feb 23 15:21:32 1999

diff -u --recursive --new-file v2.2.3/linux/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
@@ -381,7 +381,17 @@
 
 }
 
-__initfunc(static int amd_model(struct cpuinfo_x86 *c))
+#define rdmsr(msr,val1,val2) \
+       __asm__ __volatile__("rdmsr" \
+			    : "=a" (val1), "=d" (val2) \
+			    : "c" (msr))
+
+#define wrmsr(msr,val1,val2) \
+     __asm__ __volatile__("wrmsr" \
+			  : /* no outputs */ \
+			  : "c" (msr), "a" (val1), "d" (val2))
+
+__initfunc(static int get_model_name(struct cpuinfo_x86 *c))
 {
 	unsigned int n, dummy, *v;
 
@@ -401,6 +411,76 @@
 	return 1;
 }
 
+__initfunc(static int amd_model(struct cpuinfo_x86 *c))
+{
+	u32 l, h;
+	unsigned long flags;
+	int mbytes = max_mapnr >> (20-PAGE_SHIFT);
+	
+	int r=get_model_name(c);
+	
+	/*
+	 *	Now do the cache operations. 
+	 */
+	 
+	switch(c->x86)
+	{
+		case 5:
+			if( c->x86_model < 6 )
+			{
+				/* Anyone with a K5 want to fill this in */				
+				break;
+			}
+			
+			/* K6 with old style WHCR */
+			if( c->x86_model < 8 ||
+				(c->x86_model== 8 && c->x86_mask < 8))
+			{
+				/* We can only write allocate on the low 508Mb */
+				if(mbytes>508)
+					mbytes=508;
+					
+				rdmsr(0xC0000082, l, h);
+				if((l&0x0000FFFF)==0)
+				{		
+					l=(1<<0)|(mbytes/4);
+					save_flags(flags);
+					__cli();
+					__asm__ __volatile__ ("wbinvd": : :"memory");
+					wrmsr(0xC0000082, l, h);
+					restore_flags(flags);
+					printk(KERN_INFO "Enabling old style K6 write allocation for %d Mb\n",
+						mbytes);
+					
+				}
+				break;
+			}
+			if (c->x86_model == 8 || c->x86_model == 9)
+			{
+				/* The more serious chips .. */
+				
+				if(mbytes>4092)
+					mbytes=4092;
+				rdmsr(0xC0000082, l, h);
+				if((l&0xFFFF0000)==0)
+				{
+					l=((mbytes>>2)<<22)|(1<<16);
+					save_flags(flags);
+					__cli();
+					__asm__ __volatile__ ("wbinvd": : :"memory");
+					wrmsr(0xC0000082, l, h);
+					restore_flags(flags);
+					printk(KERN_INFO "Enabling new style K6 write allocation for %d Mb\n",
+						mbytes);
+				}
+				break;
+			}
+			break;
+	}
+	return r;
+}
+			
+
 /*
  * Read Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
  */
@@ -517,7 +597,7 @@
 		
 		/* GXm supports extended cpuid levels 'ala' AMD */
 		if (c->cpuid_level == 2) {
-			amd_model(c);  /* get CPU marketing name */
+			get_model_name(c);  /* get CPU marketing name */
 			c->x86_capability&=~X86_FEATURE_TSC;
 			return;
 		}
@@ -642,6 +722,20 @@
 
 	if (c->x86_vendor == X86_VENDOR_AMD && amd_model(c))
 		return;
+		
+	if (c->cpuid_level > 0 && c->x86_vendor == X86_VENDOR_INTEL)
+	{
+		if(c->x86_capability&(1<<18))
+		{
+			/* Disable processor serial number on Intel Pentium III 
+			   from code by Phil Karn */
+			unsigned long lo,hi;
+			rdmsr(0x119,lo,hi);
+			lo |= 0x200000;
+			wrmsr(0x119,lo,hi);
+			printk(KERN_INFO "Pentium-III serial number disabled.\n");
+		}
+	}
 
 	for (i = 0; i < sizeof(cpu_models)/sizeof(struct cpu_model_info); i++) {
 		if (c->cpuid_level > 1) {
@@ -726,15 +820,6 @@
 }
 	
 	
-#define rdmsr(msr,val1,val2) \
-       __asm__ __volatile__("rdmsr" \
-			    : "=a" (val1), "=d" (val2) \
-			    : "c" (msr))
-
-#define wrmsr(msr,val1,val2) \
-     __asm__ __volatile__("wrmsr" \
-			  : /* no outputs */ \
-			  : "c" (msr), "a" (val1), "d" (val2))
 
 static char *cpu_vendor_names[] __initdata = {
 	"Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur" };
@@ -785,8 +870,8 @@
 	static char *x86_cap_flags[] = {
 	        "fpu", "vme", "de", "pse", "tsc", "msr", "6", "mce",
 	        "cx8", "9", "10", "sep", "12", "pge", "14", "cmov",
-	        "16", "17", "18", "19", "20", "21", "22", "mmx",
-	        "24", "25", "26", "27", "28", "29", "30", "31"
+	        "16", "17", "psn", "19", "20", "21", "22", "mmx",
+	        "24", "kni", "26", "27", "28", "29", "30", "31"
 	};
 	struct cpuinfo_x86 *c = cpu_data;
 	int i, n;
@@ -836,6 +921,7 @@
 			x86_cap_flags[14] = "mca";
 			x86_cap_flags[16] = "pat";
 			x86_cap_flags[17] = "pse36";
+			x86_cap_flags[18] = "psn";
 			x86_cap_flags[24] = "osfxsr";
 		}