patch-1.3.16 linux/include/linux/pci.h

• Lines: 101
• Date: Tue Aug 8 09:20:35 1995
• Orig file: v1.3.15/linux/include/linux/pci.h
• Orig date: Wed Aug 2 13:21:16 1995

diff -u --recursive --new-file v1.3.15/linux/include/linux/pci.h linux/include/linux/pci.h
@@ -58,6 +58,9 @@
 #define  PCI_COMMAND_FAST_BACK	0x200	/* Enable back-to-back writes */
 
 #define PCI_STATUS		0x06	/* 16 bits */
+#define  PCI_STATUS_66MHZ	0x20	/* Support 66 Mhz PCI 2.1 bus */
+#define  PCI_STATUS_UDF		0x40	/* Support User Definable Features */
+
 #define  PCI_STATUS_FAST_BACK	0x80	/* Accept fast-back to back */
 #define  PCI_STATUS_PARITY	0x100	/* Detected parity error */
 #define  PCI_STATUS_DEVSEL_MASK	0x600	/* DEVSEL timing */
@@ -108,7 +111,9 @@
 #define  PCI_BASE_ADDRESS_IO_MASK	(~0x03)
 /* bit 1 is reserved if address_space = 1 */
 
-/* 0x28-0x2f are reserved */
+#define PCI_CARDBUS_CIS		0x28
+#define PCI_SUBSYSTEM_ID	0x2c
+#define PCI_SUBSYSTEM_VENDOR_ID	0x2e  
 #define PCI_ROM_ADDRESS		0x30	/* 32 bits */
 #define  PCI_ROM_ADDRESS_ENABLE	0x01	/* Write 1 to enable ROM,
 					   bits 31..11 are address,
@@ -127,12 +132,14 @@
 #define PCI_CLASS_STORAGE_IDE		0x0101
 #define PCI_CLASS_STORAGE_FLOPPY	0x0102
 #define PCI_CLASS_STORAGE_IPI		0x0103
+#define PCI_CLASS_STORAGE_RAID		0x0104 
 #define PCI_CLASS_STORAGE_OTHER		0x0180
 
 #define PCI_BASE_CLASS_NETWORK		0x02
 #define PCI_CLASS_NETWORK_ETHERNET	0x0200
 #define PCI_CLASS_NETWORK_TOKEN_RING	0x0201
 #define PCI_CLASS_NETWORK_FDDI		0x0202
+#define PCI_CLASS_NETWORK_ATM		0x0203
 #define PCI_CLASS_NETWORK_OTHER		0x0280
 
 #define PCI_BASE_CLASS_DISPLAY		0x03
@@ -157,8 +164,48 @@
 #define  PCI_CLASS_BRIDGE_MC		0x0603
 #define  PCI_CLASS_BRIDGE_PCI		0x0604
 #define  PCI_CLASS_BRIDGE_PCMCIA	0x0605
+#define  PCI_CLASS_BRIDGE_NUBUS		0x0606
+#define  PCI_CLASS_BRIDGE_CARDBUS	0x0607
 #define  PCI_CLASS_BRIDGE_OTHER		0x0680
 
+
+#define PCI_BASE_CLASS_COMMUNICATION	0x07
+#define PCI_CLASS_COMMUNICATION_SERIAL	0x0700
+#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
+#define PCI_CLASS_COMMUNICATION_OTHER	0x0780
+
+#define PCI_BASE_CLASS_SYSTEM		0x08
+#define PCI_CLASS_SYSTEM_PIC		0x0800
+#define PCI_CLASS_SYSTEM_DMA		0x0801
+#define PCI_CLASS_SYSTEM_TIMER		0x0802
+#define PCI_CLASS_SYSTEM_RTC		0x0803
+#define PCI_CLASS_SYSTEM_OTHER		0x0880
+
+#define PCI_BASE_CLASS_INPUT		0x09
+#define PCI_CLASS_INPUT_KEYBOARD	0x0900
+#define PCI_CLASS_INPUT_PEN		0x0901
+#define PCI_CLASS_INPUT_MOUSE		0x0902
+#define PCI_CLASS_INPUT_OTHER		0x0980
+
+#define PCI_BASE_CLASS_DOCKING		0x0a
+#define PCI_CLASS_DOCKING_GENERIC	0x0a00
+#define PCI_CLASS_DOCKING_OTHER		0x0a01
+
+#define PCI_BASE_CLASS_PROCESSOR	0x0b
+#define PCI_CLASS_PROCESSOR_386		0x0b00
+#define PCI_CLASS_PROCESSOR_486		0x0b01
+#define PCI_CLASS_PROCESSOR_PENTIUM	0x0b02
+#define PCI_CLASS_PROCESSOR_ALPHA	0x0b10
+#define PCI_CLASS_PROCESSOR_POWERPC	0x0b20
+#define PCI_CLASS_PROCESSOR_CO		0x0b40
+
+#define PCI_BASE_CLASS_SERIAL		0x0c
+#define PCI_CLASS_SERIAL_FIREWIRE	0x0c00
+#define PCI_CLASS_SERIAL_ACCESS		0x0c01
+#define PCI_CLASS_SERIAL_SSA		0x0c02
+#define PCI_CLASS_SERIAL_USB		0x0c03
+#define PCI_CLASS_SERIAL_FIBER		0x0c04
+
 #define PCI_CLASS_OTHERS		0xff
 
 
@@ -221,6 +268,7 @@
 #define PCI_DEVICE_ID_INTEL_82371	0x122e
 #define PCI_DEVICE_ID_INTEL_82438	0x1230
 #define PCI_DEVICE_ID_INTEL_7116	0x1223
+#define PCI_DEVICE_ID_INTEL_82865	0x1227
 
 #define PCI_VENDOR_ID_SMC		0x1042
 #define PCI_DEVICE_ID_SMC_37C665	0x1000
@@ -254,6 +302,7 @@
 #define PCI_DEVICE_ID_AL_M1445		0x1445
 #define PCI_DEVICE_ID_AL_M1449		0x1449
 #define PCI_DEVICE_ID_AL_M1451		0x1451
+#define PCI_DEVICE_ID_AL_M1461		0x1461
 #define PCI_DEVICE_ID_AL_M4803		0x5215
 
 #define PCI_VENDOR_ID_TSENG		0x100c